Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1997-10-09
1999-03-16
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438151, 438166, 438300, 438154, H01L 2100
Patent
active
058829580
ABSTRACT:
The present invention is a technique for producing silicon-on-insulator MOS transistors by damascene patterning of source-drain regions in a thin film of amorphous silicon deposited on a layer of oxide grown on a silicon wafer, where the oxide has previously been etched with a pattern of trenches. In addition, the technique provides for the amorphous layer to contact the underlying silicon substrate through multiple small oxide openings, where subsequent transistor channel regions will align to these openings. After patterning, the wafer is annealed in a high temperature cycle, where the regions of amorphous silicon in contact with the silicon substrate will grow into single crystal silicon suitable for transistor channel regions.
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Gurley Lynne A.
Niebling John F.
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