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Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Amorphous carbon layer for improved adhesion of photoresist...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Amorphous etch stop for the anisotropic etching of substrates

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Amorphous silicon disposable spacer to reduce mask count in...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Analog capacitor having at least three high-k dielectric...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Analog capacitor in dual damascene process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Angle implant process for cellular deep trench sidewall doping

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Angled halo implant tailoring using implant mask

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Angled implant for shorter trench emitter

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Angled implant to build MOS transistors in contact holes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Angled implant to build MOS transistors in contact holes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Angled implantation for deep submicron device optimization

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Angled ion implantation for selective doping

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Anisotropic chemical etching process of silicon oxide in the man

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Anisotropic stress generation by stress-generating liners...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Anneal for enhancing the electrical characteristic of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Anneal technique for reducing amount of electronic trap in...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Annealed porous silicon with epitaxial layer for SOI

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Annealed wafer manufacturing method and annealed wafer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Annealing of silicon oxynitride and silicon nitride films to eli