Analog capacitor in dual damascene process

Details Analog capacitor in dual damascene process Analog capacitor in dual damascene process

2007-02-13

2007-02-13

Le, Thao X. (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S396000, C438S244000, C257S306000, C257SE21648

Reexamination Certificate

active

10959868

ABSTRACT:
A process for forming a capacitive structure that includes an upper layer having a first capacitor electrode section therein. A capacitor dielectric layer is formed adjacent the upper layer. The capacitor dielectric layer covers the first capacitor electrode section. A second capacitor electrode layer is formed adjacent the capacitor dielectric layer. The second capacitor electrode layer includes a second capacitor electrode section that at least partially covers the first capacitor electrode section, and which has an edge portion that extends beyond the underlying first capacitor electrode section. The capacitor dielectric layer being disposed between the first capacitor electrode section and the second capacitor electrode section. An upper dielectric layer is formed adjacent the second capacitor electrode section. Portions of the upper dielectric layer and the second capacitor electrode section are selectively removed to form a first via cavity that extends through the upper dielectric layer and the edge portion of the second capacitor electrode section. This exposes the edge portion of the second capacitor electrode section within the first via cavity. The first via cavity is filled with a via metal, which makes electrical connection with the edge portion of the second capacitor electrode section that is exposed within the first via cavity.

REFERENCES:
patent: 6180976 (2001-01-01), Roy
patent: 6475911 (2002-11-01), Lane
patent: 6498364 (2002-12-01), Downey et al.
patent: 6642564 (2003-11-01), Ogawa et al.
patent: 6764915 (2004-07-01), Lee
patent: 6812088 (2004-11-01), Chen et al.
patent: 2002/0192919 (2002-12-01), Bothra
patent: 2003/0178666 (2003-09-01), Lee et al.

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