N-channel LDMOS with buried P-type region to prevent...

Details N-channel LDMOS with buried P-type region to prevent... N-channel LDMOS with buried P-type region to prevent...

2007-09-11

2007-09-11

Smith, Zandra V. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S040000

Reexamination Certificate

active

11179857

ABSTRACT:
An improved n-channel integrated lateral DMOS (10) in which a buried body region (30), beneath and self-aligned to the source (18) and normal body diffusions, provides a low impedance path for holes emitted at the drain region (16). This greatly reduces secondary electron generation, and accordingly reduces the gain of the parasitic PNP bipolar device. The reduced regeneration in turn raises the critical field value, and hence the safe operating area.

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