Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-03-22
2011-03-22
Pham, Thanhha (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S201000, C438S593000, C438S259000, C257SE21422
Reexamination Certificate
active
07910430
ABSTRACT:
A NAND flash memory device and method of manufacturing the same is disclosed. Source and drain select transistor gates are recessed lower than an active region of a semiconductor substrate. A valid channel length of the source and drain select transistor gates is longer than a channel length of memory cell gates. Accordingly, an electric field between a source region and a drain region of the select transistor can be reduced. It is thus possible to prevent program disturbance from occurring in edge memory cells adjacent to the source and drain select transistors in non-selected cell strings.
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State Intellectual Property Office , The First Office Action, Application No. 2006100941797, Mar. 28, 2008.
Kim Nam Kyeong
Kim Se Jun
Om Jae Chul
Hynix / Semiconductor Inc.
Kilpatrick Townsend & Stockton LLP
Pham Thanhha
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