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Nanometer-scale semiconductor devices and method of making

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nanoscale fet

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nanotube memory cell with floating gate based on passivated...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nanotube semiconductor devices and methods for making the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nanowire transistor and method for forming same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nanowire transistor with surrounding gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nanowire transistor with surrounding gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Narrow high performance MOSFET device design

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Narrow isolation oxide process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Narrow wide spacer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Narrow width CMOS devices fabricated on strained lattice...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Narrow width metal oxide semiconductor transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Narrower erase distribution for flash memory by smaller poly gra

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Natural analog or multilevel transistor DRAM-cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Negative ion implant mask formation for self-aligned,...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Negative resist or dry develop process for forming middle of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Negative resistance memory cell and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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NFET and PFET devices and methods of fabricating same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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NFET and PFET devices and methods of fabricating same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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NFETs using gate induced stress modulation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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