Nand-structured and amorphous silicon based read-only memory dev

Details Nand-structured and amorphous silicon based read-only memory dev Nand-structured and amorphous silicon based read-only memory dev

1997-05-16

1999-02-09

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438282, H01L 218234

Patent

active

058693734

ABSTRACT:
A NAND-structure and amorphous-silicon based ROM device is provided. This ROM device is of the type including an array of MOSFET memory cells that are constructed based on a silicon-on-insulator (SOI) structure, so as to isolate the source/drain regions from the underlying substrate to prevent the occurrence of leakage current therebetween. Further, the SOI structure prevents occurrence of breakdown at the diode junction between the source/drain regions and the substrate for increased operating voltage. In this ROM device, the source/drain regions for the MOSFET memory cells are formed from the intrinsic amorphous-silicon, instead of highly-doped polysilicon, so that the fabrication process for the ROM device is significantly simplified.

REFERENCES:
patent: 5510287 (1996-04-01), Chen et al.
patent: 5616946 (1997-04-01), Hsu et al.
patent: 5627091 (1997-05-01), Hong

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