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Test framework for testing an application

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Test generation methods for reducing power dissipation and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test generator for converting a model of computer component...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test generator having a poisson distribution error signal

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test harness benchmark file

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Test head utilized in a test system to perform automated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test interface for memory elements

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test interface for random access memory (RAM) built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test interface for verification of high speed embedded...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test interface, system, and method for testing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test language conversion method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test limits based on position

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test method and apparatus for semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test method and apparatus for writing a memory array with a redu

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test method and apparatus using energy consumption ratio

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test method and architecture for circuits having inputs

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test method and test apparatus for an electronic module

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test method and test circuit for electronic device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test method and test circuit for electronic device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Test method and test device for electronic memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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