Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2001-02-28
2004-11-09
Lamarre, Guy J. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C708S252000
Reexamination Certificate
active
06816992
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the testing of digital communication systems, and more particularly to a test set having a Poisson distribution error signal for generating from a known digital data signal a test signal with a Poisson distribution of errors for use in the testing of digital communication systems.
In the testing of digital communication systems, such as SONET/SDH telecommunication systems, it is desired to stress the systems during testing to determine the boundaries within which the systems will continue to operate effectively. To do this errors are intentionally introduced into a known digital data signal to produce a test signal, and the output of the system in response to the test signal is compared to the known digital data signal to determine what degradation occurs as a result of the introduced errors. In the past errors have been generated on an evenly spaced-in-time basis when producing the test signal. This approach produces errors at a very well specified rate, but the distribution of errors is not a pattern normally found in real world signals. It is possible to get much more randomly distributed errors by attenuating the known digital data signal to produce the test signal, but this is a very approximate approach with no real control over the actual error rate obtained, as well as providing no capability for selectively applying the errors to specific parts of the known digital data signal. In the real world errors come in several distributions, including totally random and bursts of errors. In a totally random, or Poisson, distribution each bit of the digital data signal is errored independently of all other bits. This requires, for a 2.48832 GHz signal generated 32 bits at a time from a 77.76 MHz clock, 32 independent error signals each clock cycle.
What is desired is a test set having a Poisson distribution error signal which generates from a known digital data signal a test signal having a Poisson distribution of errors at a specified rate.
BRIEF SUMMARY OF THE INVENTION
Accordingly the present invention provides a test set for digital communication systems that generates a Poisson distribution error signal to produce from a known digital data signal a test signal having a Poisson distribution of errors. A Poisson error signal generator for the test set has in broadest terms for each bit of an m-bit error signal a pseudo-random binary sequence (PRBS) signal having n bits per clock cycle. Each PRBS signal is compared separately in a corresponding n-bit comparator with a probability control signal reflecting the probability that the bit will be set to a “1” so that for each bit of the m-bit error signal, if the PRBS signal is less than the probability control signal, then that bit of the error signal is set to “1”. To simplify the circuitry a single PRBS generator is used having an output number of bits per clock cycle equal to k, where k is greater than n and less than n*m. These bits are distributed so that each of the m comparators receives n bits from the k bits of the PRBS signal for comparison with the control signal. A further simplification reduces the complication of the m comparators by taking into account an error rate where the probability is negligible that multiple bits of the error signal will be set simultaneously, i.e., the probability is that only one of the m bits will be set. Then for probabilities above the “single bit” probability the comparators need only be n′-bit comparators, where n′ is less than n, and only the n′ most significant bits of the probability control signal are input to the comparators. For the “single bit” case a separate n-bit comparator is used and, when the bit is set, only one of the m bits of the error signal is affected on a random basis. The resulting Poisson distribution error signal from the error signal generator is exclusively OR′d in the test set with the known digital data signal to produce the test signal with a Poisson distribution of errors at a specified rate.
The objects, advantages and other novel features of the present invention are apparent from the following detailed description when read in conjunction with the appended claims and attached drawing.
REFERENCES:
patent: 4897842 (1990-01-01), Herz et al.
patent: 5369648 (1994-11-01), Nelson
patent: 5485471 (1996-01-01), Bershteyn
Gray Francis I.
Lamarre Guy J.
Tektronix Inc.
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