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Validating data using processor instructions

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Validating test signal connections within an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Validation of procedures

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Valuation of tester accuracy

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Variable bit width cache memory architecture

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable clocked scan test circuitry and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Variable code rate and signal constellation turbo trellis...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable code rate and signal constellation turbo trellis...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable code rate and signal constellation turbo trellis...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable domain redundancy replacement configuration for a memor

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Variable forward error correction for optical communication...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable Hamming error correction for a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable modulation with LDPC (low density parity check) coding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable modulation with LDPC (low density parity check) coding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable redundancy cyclic code encoders

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable sector-count ECC

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable self-time scheme for write recovery by low speed...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Variable strength ECC

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable width parallel cyclical redundancy check

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Variable writing through a fixed programming interface

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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