Test method and test circuit for electronic device

Details Test method and test circuit for electronic device Test method and test circuit for electronic device

2007-07-31

2007-07-31

Torres, Joseph D. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S727000, C326S016000

Reexamination Certificate

active

11198221

ABSTRACT:
A method of testing an electronic device including first and second semiconductor devices connected to each other with a plurality of bus lines. First, the first semiconductor device supplies a selected one of the bus lines with a first logical output signal. Then, the second semiconductor device acquires a first bus line signal from the selected bus line. The second semiconductor device inverts the first bus line signal to generate a second logical output signal. The second semiconductor device transmits the second logical output signal to the first semiconductor device. The first semiconductor device receives a second bus line signal from the selected bus line. The first semiconductor device compares the first logical output signal and the second bus line signal to detect a connection between the first semiconductor device and the second semiconductor device.

REFERENCES:
patent: 4049956 (1977-09-01), Van Veen
patent: 4255789 (1981-03-01), Hartford et al.
patent: 4672583 (1987-06-01), Nakaizumi
patent: 4691161 (1987-09-01), Kant et al.
patent: 4698588 (1987-10-01), Hwang et al.
patent: 4733405 (1988-03-01), Shimizume et al.
patent: 4847838 (1989-07-01), Kralik
patent: 4897817 (1990-01-01), Katanosaka
patent: 5193093 (1993-03-01), Okazaki
patent: 5299203 (1994-03-01), Steele
patent: 5331571 (1994-07-01), Aronoff et al.
patent: 5367395 (1994-11-01), Yajima et al.
patent: 5367491 (1994-11-01), Han et al.
patent: 5369645 (1994-11-01), Pritchard et al.
patent: 5495486 (1996-02-01), Gheewala
patent: 5644251 (1997-07-01), Colwell et al.
patent: 5659548 (1997-08-01), Okamoto et al.
patent: 5770964 (1998-06-01), Suma
patent: 0 744 755 (1996-11-01), None
patent: 01-262486 (1989-10-01), None
patent: 03-210483 (1991-09-01), None
patent: 05053857 (1993-03-01), None
patent: 5-99980 (1993-04-01), None
patent: 05-099980 (1993-04-01), None
patent: 5-043400 (1993-06-01), None
patent: 05-275621 (1993-10-01), None
patent: 07-027826 (1995-01-01), None
patent: 7-159493 (1995-06-01), None
patent: 7-174820 (1995-07-01), None
patent: 7-229951 (1995-08-01), None
patent: 09-198274 (1997-07-01), None
patent: 10-019992 (1998-01-01), None
patent: 10-090360 (1998-04-01), None
Borghesani, A. F., et al. “A Simple IEEE-488 Bus Tester”, Review of Scientific Instruments, American Institute of Physics, New York, US, vol. 66, No. 6, Jun. 1, 1995, pp. 3711-3712, XP000511254 ISSN: 0034-6748.
International Publication No. WO 97/40394, Published Oct. 30, 1997.

Affiliated with

Also associated with

Rating

Test method and test circuit for electronic device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Test method and test circuit for electronic device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test method and test circuit for electronic device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3745370