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Two boundary scan cell switches controlling input to output...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Two dimensional data eye centering for source synchronous...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data pulse evaluation/bit decision
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Two node virtual shared disk cluster recovery

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Two pass multi-state parallel test for semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Two stage date packet processing scheme

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Two stage detector having viterbi detector matched to a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Two stage detector having viterbi detector matched to a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Two stage S—Random interleaver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Two-dimensional interleaving in a modem pool environment

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Two-dimensional printed code for storing biometric...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Two-dimensional redundancy calculation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Two-dimensional storage array with prompt parity in one...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Two-MCU system and hang-up detecting method of MCU

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Two-phase clock-stalling technique for error detection and...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Two-phase data-transfer protocol

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control
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Two-phase root cause analysis

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Two-stage detection of trace identifier mismatches

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Two-wire interface having embedded per frame reliability...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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