LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery

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IC tap/scan test port access with tap lock circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC test cell with memory output connected to input multiplexer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC test equipment, measurement method in the IC test equipment,

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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IC test software system for mapping logical functional test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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IC test system and storage medium for the same

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC tester having region in which various test conditions are...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC testing apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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IC testing methods and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC testing methods and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with addressable test port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with cache bit memory in series with scan segment

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with expected data memory coupled to scan data register

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with external register present lead connected to...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with internal interface switch for testability

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with IP core and user-added scan register

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with JTAG port, linking module, and off-chip TAP interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with latching and switched I/O buffers

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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IC with protocol selection memory coupled to serial scan path

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

[ 0.00 ] – not rated yet Voters 0 Comments 0

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