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Tester built-in semiconductor integrated circuit device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Tester channel count reduction using observe logic and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tester for testing semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tester of semiconductor memory device and test method thereof

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Tester system having a multi-purpose memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tester system having multiple instruction memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tester-compatible timing translation system and method using tim

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Testing a bus coupled between two electronic devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Testing a circuit with compressed scan chain subsets

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing a multibank memory module

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing a multibank memory module

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing a processor using a random code generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing a programmable logic device with embedded fixed...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing a transceiver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing address lines of a memory controller

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing an embedded core

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing an integrated circuit having configurable...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Testing an integrated circuit using dedicated function pins

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing an operation of integrated circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing and burn-in of IC chips using radio frequency transmissi

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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