LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling

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Integrated memory and method for testing an integrated memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...

Reexamination Certificate

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Integrated memory and method for testing the memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Integrated memory device and method for its testing and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Integrated memory having a redundancy function

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

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Integrated memory having a test circuit for functional...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Integrated module having a plurality of separate substrates

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Integrated multi-channel analog test instrument architecture...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Integrated multi-channel fiber channel analyzer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing

Reexamination Certificate

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Integrated packet bit error rate tester for 10G SERDES

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate

Reexamination Certificate

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Integrated reed-solomon error correction code encoder and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Integrated scannable interface for testing memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Integrated semiconductor memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Integrated semiconductor memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Integrated structure for a convolutive viterbi decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Patent

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Integrated system logic and ABIST data compression for an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Integrated test apparatus and method therefor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Integrated test circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Integrated test circuit, a test circuit, and a test method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Integrated test-on-chip system and method and apparatus for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Integrated testing of serializer/deserializer in FPGA

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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