Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent
1997-02-18
1999-10-12
Grant, William
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
714792, 714794, 714796, 375261, 375262, 375265, 375340, 375341, G06F 1110
Patent
active
059648970
ABSTRACT:
An integrated structure of a network of N add-compare-select (ACS) units associated with N states of a trellis of a Viterbi convolutive decoder. The ACS units are physically gathered by pairs juxtaposed to form two spaced apart parallel columns, each pair including two ACS units associated, respectively, with states 2n and 2n+1 modulo-N (n being a positive integer). Each of the two ACS units of the pair is coupled, for receiving two path metrics, to an ACS unit associated with one of states n and n+N/2 of a close pair and to an ACS unit associated with the other of states n and n+N/2 of a remote pair. The space between the two columns constitutes a common channel that includes the interconnections between remote pairs of units. The structure is implemented in a technology with at least three metallization layers and wherein the two ACS units of each pair are juxtaposed along the column height.
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Michel Thierry
Remond Fran.cedilla.ois
Grant William
Marc McDieunel
SGS-Thomson Microelectronics S.A.
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