Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-06-05
2007-06-05
Ton, David (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S048000
Reexamination Certificate
active
11090831
ABSTRACT:
The invention relates to a module having a first integrated circuit and a second integrated circuit which are arranged on separate substrates, having a first output terminal and a second output terminal to which the first and second integrated circuits are respectfully connected in a parallel manner, and having a first selection terminal and a second selection terminal which are mutually separate and are connected to the first and second integrated circuits, respectively. A test circuit is provided in each of the integrated circuits to generate an error signal depending on whether an error occurred during a test operation, and an output circuit is provided in each of the integrated circuits to select the first output terminal or the second output terminal, depending on a selection signal that is applied to the respective selection terminal, for the purpose of outputting a state that indicates the error.
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German Patent Office Examination Report dated Dec. 23, 2004.
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