Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2006-05-30
2008-10-07
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S731000, C714S744000
Reexamination Certificate
active
07434121
ABSTRACT:
An integrated memory device includes an array of memory cells for storing data, a memory cell selector operationally connected to the array for selecting at least one memory cell of the array, a data interface adapted to store data provided to the data interface in a selected memory cell and to provide data stored in a selected memory cell to the data interface for retrieval, and a control circuit operationally connected to the memory cell selector and the data interface.
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Infineon Technologies Flash GmbH & Co. KG
Slater & Matsil L.L.P.
Ton David
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