Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-24
2007-07-24
Ton, David (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S703000
Reexamination Certificate
active
10909919
ABSTRACT:
A microchip system comprises a self check subsystem operable to perform a self test of at least one subsystem of the microchip system, and/or on the interoperability of subsystems. An antenna and a communications subsystem wirelessly transmit self check information from the microchip system. The communications subsystem may also receive information, data or instructions from an off-chip system or device. Self check tests may occur during manufacture of the microchip system and/or during operation. The microchip system may comprise a passive power subsystem coupled to an antenna to receive power in the form of an electromagnetic field, and which provides electrical power derived therefrom to at least one other subsystem of the microchip system.
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Maltseff Paul A.
Payne Ronald D.
Intermec IP Corp.
Seed IP Law Group PLLC
Ton David
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