Search
Selected: C

Circuit and method for time-efficient memory repair

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and method for varying a pulse width of an internal...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and method providing dynamic scan chain partitioning

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and method to prevent inadvertent test mode entry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and method to prevent inadvertent test mode entry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and method to prevent inadvertent test mode entry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and signal encoding method for reducing the number...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and/or method for automated use of unallocated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit apparatus and method for testing integrated circuits...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement and method for checking the function of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement and method for driving electronic chips

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement and method for driving electronic chips

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement and method for minimizing bit errors

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement and method of testing an application...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement for processing data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement having a number of integrated circuit...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit arrangement, electronic mechanism, electrical turn...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit cell for test pattern generation and test pattern...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit cell having a built-in self-test function, and test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit configuration for the burn-in test of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.