Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-07-18
2006-07-18
Tu, Christine T. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S739000
Reexamination Certificate
active
07080298
ABSTRACT:
A method for testing an electronic circuit includes selecting an input signal using a first multiplexer, selecting a signal to be input to the first multiplexer using at least one other multiplexer, and controlling the at least one other multiplexer using a selection signal output from a control circuit.
REFERENCES:
patent: 5043988 (1991-08-01), Brglez et al.
patent: 5181191 (1993-01-01), Farwell
patent: 5612963 (1997-03-01), Koenemann et al.
patent: 5805608 (1998-09-01), Baeg et al.
patent: 5983380 (1999-11-01), Motika et al.
patent: 6327684 (2001-12-01), Nadeau-Dosti et al.
patent: 6671838 (2003-12-01), Koprowski et al.
M. Morris Mano, “Computer System Architecture”, 2ndedition, Prentice-Hall, Inc., NJ, 1982, pp. 53-54.
Bushard Louis B
Kiryu Naoki
Hogan & Hartson LLP
International Business Machines Corporaton
Toshiba America Electronic Components
Tu Christine T.
LandOfFree
Circuit apparatus and method for testing integrated circuits... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit apparatus and method for testing integrated circuits..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit apparatus and method for testing integrated circuits... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3593818