Concurrent memory control for turbo decoders

Concurrent production of CRC syndromes for different data...

Concurrent row/column syndrome generator for a product code

Concurrently programmable dynamic memory built-in self-test...

Conductive paths controllably coupling pad groups arranged...

Configurable and memory architecture independent memory...

Configurable architecture and its implementation of viterbi...

Configurable decoder and method for decoding a reed-solomon...

Configurable encoder and method for generating a...

Configurable error detection and correction engine that has...

Configurable IC with error detection and correction circuitry

Configurable integrated circuit and method of testing the same

Configurable interface module

Configurable memory architecture with built-in testing...

Configurable memory design for masked programmable logic

Configurable Reed-Solomon controller and method

Configurable scan path structure

Configurable, fast, 32-bit CRC generator for 1-byte to...

Configuration and method for storing the test results...

Configuration control in a programmable logic device using non-v