Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2003-06-19
2009-08-04
Abraham, Esaw T (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C382S296000, C381S022000
Reexamination Certificate
active
07571370
ABSTRACT:
A method and circuit for performing CRC calculations permits variable width data input. Preferably, multiple CRC calculations are performed in parallel, each CRC calculation involving a different number of data bits from the data word and terminating within one clock cycle. The CRC polynomial is preferably incorporated into the hardware for each CRC calculation.
REFERENCES:
patent: 5361334 (1994-11-01), Cawley
patent: 5734826 (1998-03-01), Olnowich et al.
patent: 6192498 (2001-02-01), Arato
patent: 6351142 (2002-02-01), Abbott
patent: 6487686 (2002-11-01), Yamazaki et al.
patent: 6560742 (2003-05-01), Dubey et al.
patent: 6701478 (2004-03-01), Yang et al.
Parallel Cyclic Redundancy Check (CRC) for HOTLink™; Cypress Semiconductor Corporation; Mar. 11, 1999.
CRC Tool, Computing CRC in Parallel for Ethernet; Adrian Simionescu, Design Engineer.
Behera Suparna
Ridgeway Jeremy
Viswanath Ravindra
Abraham Esaw T
Ahmed Enam
LSI Logic Corporation
Suiter Swantz pc llo
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