At-speed scan testing of memory arrays
Automated determination and display of the physical location...
Automated method of burn-in and endurance testing for embedded E
Automated scan testing of DDR SDRAM
Automated tests for built-in self test
Automatic bit fail mapping for embedded memories with clock...
Automatic test entry termination in a memory device
Automatic test entry termination in a memory device
Bad block identifying method for flash memory, storage...
Bad page marking strategy for fast readout in memory
BCA data replay
Buffered memory module and method for testing same
Built in self test BIST for RAMS using a Johnson counter as a so
Built-in redundancy analysis for memories with row and...
Built-in self test (BIST) architecture having distributed...
Built-in self test for multiple memories in a chip
Built-in self test system and method for two-dimensional...
Built-in self-repair of semiconductor memory with redundant...
Built-in self-repair wrapper methodology, design flow and...
Built-in self-test (BIST) architecture having distributed...