Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2005-06-14
2005-06-14
Tu, Christine T. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S711000, C714S704000, C365S201000
Reexamination Certificate
active
06907554
ABSTRACT:
A built-in self test system (124) and method for two-dimensional memory redundancy allocation. The built-in self test system is adapted to allocate two redundant columns (116) and one redundant row (120) to an embedded memory (104) as needed to repair single cell failures (SCFs) within the rows (108) and columns of the memory. The self-test system includes a left-priority encoder (136), a right-priority encoder (140), and a greater-than-two detector (144). The left-priority encoder encodes the location of the first SCF most proximate the most-significant bit of the corresponding word. The right-priority encoder encodes the location of the first SCF most proximate the least-significant bit of the corresponding word. The greater-than-two detector determines whether a word contains more than two SCFs. If the greater-than-two detector detects that a word contains more than two SCFs, the built-in self test system identifies the corresponding row as being a must-fix row, since the number of SCFs exceeds the number of redundant columns.
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Adams R. Dean
Eckenrode Thomas J.
Gregor Steven L.
Koch Gary S.
Downs Rachlin & Martin PLLC
Tu Christine T.
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