Buffered memory module and method for testing same

Details Buffered memory module and method for testing same Buffered memory module and method for testing same

2004-04-28

2008-03-25

Kerveros, James C. (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C324S754090, C324S763010

Reexamination Certificate

active

07350120

ABSTRACT:
A buffered memory module includes a buffer circuit mounted and a plurality of memory devices mounted on the first surface of the board, the memory devices being electrically connected to the buffer circuit. The memory module also includes a plurality of test pads located on a second surface of the board and electrically connected to the buffer circuit.

REFERENCES:
patent: 5757201 (1998-05-01), Partridge et al.
patent: 6094056 (2000-07-01), Bardsley et al.
patent: 6490188 (2002-12-01), Nuxoll et al.
patent: 6700398 (2004-03-01), Co et al.
patent: 6853211 (2005-02-01), Doherty et al.
patent: 2004/0041556 (2004-03-01), Martin et al.
patent: 2005/0105350 (2005-05-01), Zimmerman
patent: 2005/0259504 (2005-11-01), Murtugh et al.
patent: 100235222 (1999-12-01), None
patent: 10200000007258 (2000-07-01), None
patent: 10200100010001 (2001-05-01), None
patent: 1020010036199 (2001-07-01), None

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