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System and method for employing patterning process...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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System and method for making photomasks

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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System and method for making photomasks

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Manufacturing optimizations
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System and method for model based multi-patterning optimization

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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System and method of correcting errors in SEM-measurements

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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System and method of predicting problematic areas for...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Systems and methods for UV lithography

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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Table-based DFM for accurate post-layout analysis

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Manufacturing optimizations
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Technique for correcting hotspots in mask patterns and write...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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Test yield estimate for semiconductor products created from...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Yield
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Triangulating design data and encoding design intent for...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle
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Uniformity for semiconductor patterning operations

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle
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Variable fill and cheese for mitigation of BEOL topography

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Manufacturing optimizations
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Verification of 3D integrated circuits

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Verifying an IC layout in individual regions and combining...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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Writing apparatus, writing data conversion method, and...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Yield evaluating apparatus and method thereof

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Yield
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Yield profile manipulator

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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