4. Computer-aided design and analysis of circuits and semiconductor
  5. Design of semiconductor mask or reticle
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Variable fill and cheese for mitigation of BEOL topography

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Manufacturing optimizations
Reexamination Certificate

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Verification of 3D integrated circuits

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
Reexamination Certificate

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Verifying an IC layout in individual regions and combining...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
Reexamination Certificate

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