Variable fill and cheese for mitigation of BEOL topography

Details Variable fill and cheese for mitigation of BEOL topography Variable fill and cheese for mitigation of BEOL topography

2011-04-12

2011-04-12

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Design of semiconductor mask or reticle

Manufacturing optimizations

Reexamination Certificate

active

07926006

ABSTRACT:
A method of designing features on a semiconductor wafer. A design of active or functional features is provided for chiplets separated by kerf areas on the wafer. The method then includes determining pattern density of the chiplet features, and applying a pattern of spaced dummy features on chiplet area not covered by active or functional features, as well as in the kerf areas. The dummy features are uniformly expanded or reduced in size until a desired dummy feature pattern density is reached.

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Lee et al.; “Using Smart Dummy Fill and Selective Reverse Etchback for Pattern Density Equalization”; Mar. 2000; Massachusetts Institute of Technology; pp. 1-4.
Kurokawa et al.; “Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills”; 2005; Proceedings of the 6th International Symposium on Quality of Electronic Design; pp. 1-6.

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