System and method for employing patterning process...

Details System and method for employing patterning process... System and method for employing patterning process...

2011-06-14

2011-06-14

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Design of semiconductor mask or reticle

Analysis and verification

C716S052000, C716S054000, C430S005000, C700S098000, C700S120000, C700S121000, C378S035000

Reexamination Certificate

active

07962865

ABSTRACT:
A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.

REFERENCES:
patent: 5987240 (1999-11-01), Kay
patent: 6063132 (2000-05-01), DeCamp et al.
patent: 6275971 (2001-08-01), Levy et al.
patent: 6397373 (2002-05-01), Tseng et al.
patent: 6418551 (2002-07-01), McKay et al.
patent: 6425113 (2002-07-01), Anderson et al.
patent: 6732338 (2004-05-01), Crouse et al.

Affiliated with

Also associated with

Rating

System and method for employing patterning process... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for employing patterning process..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for employing patterning process... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2642982