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Bit line structure for a dynamic type semiconductor memory devic

Static information storage and retrieval – Read/write circuit – Noise suppression
Patent

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Bit line structure for semiconductor memory device with bank sep

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Bit line voltage regulation circuit

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate

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Bit lines write circuit for SRAM memories

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent

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Bit map addressing schemes for flash memory

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Bit map addressing schemes for flash memory

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Bit refresh circuit for refreshing register bit values,...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Bit switch circuit and bit line selection method

Static information storage and retrieval – Read/write circuit – For complementary information
Patent

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Bit-line droop reduction

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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Bit-line precharge current limiter for CMOS dynamic memories

Static information storage and retrieval – Read/write circuit – Precharge
Patent

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Bit-line pull-up circuit

Static information storage and retrieval – Read/write circuit – Complementing/balancing
Patent

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Bit-line sense amplifier driver

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Bit-line voltage limiting isolation circuit

Static information storage and retrieval – Read/write circuit – For complementary information
Patent

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Bitline amplifier having improved response

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate

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Bitline bias circuit for non-volatile memory devices

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent

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Bitline booster circuit and method

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate

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Bitline driving circuit in semiconductor memory device and...

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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Bitline equalization system for a DRAM integrated circuit

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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Bitline exclusion in verification operation

Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate

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Bitline leakage limiting with improved voltage regulation

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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