Bitline leakage limiting with improved voltage regulation

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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Details

C365S205000, C365S189020, C365S202000

Reexamination Certificate

active

07403439

ABSTRACT:
Circuit arrangements and methods are provided for regulating and maintaining voltage on bitlines of a semiconductor memory device. According to one embodiment, first and second regulation devices are connected to a charging circuit. At the beginning of a charging period, voltage on the bitlines is regulated with the second regulation device as the bitlines are initially charged to a voltage. After initially charging the bitlines to the voltage, voltage on the bitlines is regulated with the first regulation device that also limits current to the bitlines when there is a leakage anomaly associated with the bitlines. According to another embodiment, a charging circuit that is connected to sense nodes of a sense amplifier while the sense nodes are connected to the bitlines is activated so that the charging circuit assists in charging the bitlines at the beginning of a charging period. After the bitlines are initially charged at the beginning of the charging period, voltage on the bitlines is regulated with a first regulation device that regulates current to the bitlines and limits current to the bitlines when there is a leakage anomaly associated with the bitlines.

REFERENCES:
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patent: 5673231 (1997-09-01), Furutani
patent: 6016279 (2000-01-01), Chi
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patent: 6501687 (2002-12-01), Choi
patent: 6850454 (2005-02-01), Kuge et al.
patent: 7106641 (2006-09-01), Tsukada
patent: 2004/0047225 (2004-03-01), Hayakawa

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