Bit map addressing schemes for flash memory

Details Bit map addressing schemes for flash memory Bit map addressing schemes for flash memory

1996-04-19

1998-08-18

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Differential sensing

36518902, 36523001, 36523002, 36523006, G11C 700

Patent

active

057966672

ABSTRACT:
Sense path and write path architectures for read and write accesses of a memory device having memory cells that store n binary bits are disclosed. "By-output" architectures provide one output per bit such that each selected memory cell is mapped to n outputs and the n bits stored in the selected memory cell are read in parallel. "By-address" architectures provide one address per bit such that each selected memory cell is mapped to one output, and the n bits stored in the selected memory cell are read sequentially.

REFERENCES:
patent: 4202044 (1980-05-01), Beilstein, Jr. et al.
patent: 4287570 (1981-09-01), Stark
patent: 4388702 (1983-06-01), Sheppard
patent: 4415992 (1983-11-01), Aldhoch
patent: 4586163 (1986-04-01), Koike
patent: 4653023 (1987-03-01), Suzuki et al.
patent: 4701884 (1987-10-01), Aoki et al.
patent: 4771404 (1988-09-01), Mano et al.
patent: 5012448 (1991-04-01), Matsuoka et al.
patent: 5043940 (1991-08-01), Harari
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5289406 (1994-02-01), Uramoto et al.
patent: 5297148 (1994-03-01), Harari et al.
patent: 5351210 (1994-09-01), Saito
patent: 5361343 (1994-11-01), Kosonocky et al.
patent: 5375097 (1994-12-01), Reddy et al.
patent: 5416740 (1995-05-01), Fujita et al.
patent: 5430676 (1995-07-01), Ware et al.
patent: 5434817 (1995-07-01), Wave et al.
patent: 5438546 (1995-08-01), Ishac et al.
patent: 5450363 (1995-09-01), Christopherson et al.
patent: 5463582 (1995-10-01), Kobayashi et al..
patent: 5497354 (1996-03-01), Sweha et al.
patent: 5539690 (1996-07-01), Talreja et al.

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