Bitline equalization system for a DRAM integrated circuit

Details Bitline equalization system for a DRAM integrated circuit Bitline equalization system for a DRAM integrated circuit

2005-08-09

2005-08-09

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S190000

Reexamination Certificate

active

06928012

ABSTRACT:
A system for pre-charging and equalizing potentials on a bitline pair in a DRAM integrated circuit. The system includes an equalization circuit at one position on the bitline pair and another equalization circuit at another position on the bitline pair. As charge is distributed between the bitlines and to/from the pre-charge potential source through multiple conduction paths, the pre-charge and equalization time of the bitlines is reduced.

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patent: 6307768 (2001-10-01), Zimmermann
patent: 6785176 (2004-08-01), Demone
Brent Keeth, R. Jacob Baker;Dram Circuit Design; IEEE PRESS 1999, pp. 46-49.

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