Bit line structure for semiconductor memory device with bank sep

Details Bit line structure for semiconductor memory device with bank sep Bit line structure for semiconductor memory device with bank sep

1993-11-04

1995-10-24

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Differential sensing

365 72, 36518909, 365210, 36523006, G11C 702

Patent

active

054615895

ABSTRACT:
A semiconductor memory device of folded bit line structure provided with a cross portion in at least one portion of each of bit line pairs so that values of coupling capacitance with adjacent bit line pairs are equal to each other with respect to the paired bit lines.
Preferably, the respective bit line pairs are equally divided into 4N and the cross parts are provided at dividing points so that bit line pairs having the cross parts at the same dividing points are arranged on alternate pairs of bit lines.
Preferably, the cross parts are provided in regions for forming restore circuits or sense amplifiers.
More preferably, a dummy word line for selecting dummy cells for providing reference potential is selected by the position of a selected word line.

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