Bit-line droop reduction

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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Details

C365S210130

Reexamination Certificate

active

06906973

ABSTRACT:
Some embodiments provide pre-charge of a bit-line coupled to a memory cell to a reference voltage using a pre-charge device, discharge of the bit-line based on a value stored by the memory cell, injection during the discharge, of a first current into the bit-line using the pre-charge device, and injection, during the discharge, of a second current into a reference bit-line using a second pre-charge device. Also during the discharge, a difference is sensed between a voltage on the bit-line and a voltage on the reference bit-line.

REFERENCES:
patent: 5153853 (1992-10-01), Eby et al.
patent: 6370060 (2002-04-01), Takata et al.

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