Reduced thickness variation in a material layer deposited in...
Reduced topography DRAM cell fabricated using a modified...
Reduced wafer warpage in semiconductors by stress...
Reduced water adsorption for interlayer dielectric
Reduced-particle method of processing a semiconductor and/or int
Reducing agent for high-K gate dielectric parasitic...
Reducing CMP scratch, dishing and erosion by post CMP etch...
Reducing contamination in a process flow of forming a...
Reducing contamination induced scumming, for semiconductor...
Reducing contamination of semiconductor substrates during...
Reducing contamination of semiconductor substrates during...
Reducing copper line resistivity by smoothing trench and via...
Reducing damage to ulk dielectric during cross-linked...
Reducing defect formation within an etched semiconductor...
Reducing device performance drift caused by large spacings...
Reducing dopant losses during annealing processes
Reducing external resistance of a multi-gate device using...
Reducing extrinsic base resistance in an NPN transistor
Reducing feature dimension using self-assembled monolayer
Reducing gate CD bias in CMOS processing