Reduced-particle method of processing a semiconductor and/or int

Details Reduced-particle method of processing a semiconductor and/or int Reduced-particle method of processing a semiconductor and/or int

1997-07-29

1998-12-29

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

156345, 216 67, H01L 2100, B44C 122

Patent

active

058541381

ABSTRACT:
A semiconductor and/or integrated circuit is provided having reduced particulate count upon or within the circuit. During power ramp down post etch or deposition, particles which formed within the plasma used to effectuate etch or deposition are gradually swept from the region above the integrated circuit. Plasma, and more specifically, the field which forms the plasma is maintained but at reduced levels to allow gradual reduction of particles through a multitude of steps. The steps culminate in eliminating power to the electrodes and plasma between the electrodes. However, at the time at which power is absent, only a few of the original particles remain in the critical region above the integrated circuit. Residual particles can be removed in a purge step following the successive sequence of ramp down steps. Gap between the electrodes is increased to a final position early in the ramp down sequence so that additional electrode movement does not occur when the field is weakened.

REFERENCES:
patent: 4349409 (1982-09-01), Shibayama et al.
patent: 5102496 (1992-04-01), Savas
patent: 5433258 (1995-07-01), Barnes et al.
patent: 5474650 (1995-12-01), Kumihashi et al.
patent: 5549786 (1996-08-01), Jones et al.

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