Using implanted poly-1 to improve charging protection in...

Using NO or N.sub.2 O treatment to generate different oxide thic

Using p-type halo implant as ROM cell isolation in flat-cell mas

Using silicate layers for composite semiconductor

Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone...

UV-blocking etch stop layer for reducing UV-induced charging...

UV-blocking layer for reducing UV-induced charging of SONOS...

UV-programmed P-type Mask ROM and fabrication thereof

Vanishingly small integrated circuit diode

Vapor phase growth of a dielectric film and a fabrication proces

Variable width offset spacers for mixed signal and system on...

VDMOS transistor protected against over-voltages between...

Versatile system for limiting electric field degradation of...

Versatile system for optimizing current gain in bipolar...

Versatile system for triple-gated transistors with...

Vertical 8F2 cell dram with active area self-aligned to bit...

Vertical bipolar SRAM cell, array and system, and a method...

Vertical bipolar transistor formed using CMOS processes

Vertical channel transistor and method of fabricating the same

Vertical channel transistor structure and manufacturing...