LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor structures and processes for forming same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor suitable for high voltage circuit

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with an ultra short channel length defined by a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with bottomwall/sidewall junction capacitance...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with dopant-bearing metal in source and drain

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with doped gate dielectric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with doped gate dielectric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with electrically induced source/drain extensions

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with embedded Si/Ge material having reduced...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with group III/VI emitter

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with high dielectric constant gate and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with immersed contacts and methods of forming...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with improved tip profile and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with increased operating voltage and method of fabric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with low resistance tip and method of fabrication in

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with reduced gate-to-source capacitance and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with reduced short channel effects and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with shaped gate electrode and method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Transistor with ultra short length defined partially by sidewall