Transistor suitable for high voltage circuit

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438510, 438514, H01L 21336

Patent

active

060966106

ABSTRACT:
A method and an apparatus for forming a transistor suitable for a high voltage circuit. In one embodiment, the transistor is formed without adding any steps to an existing state-of-the-art CMOS process. A well is implanted into a portion of a substrate such that the well has a higher doping concentration than the substrate. A first diffusion region is then implanted into the substrate such that at least a portion of the first diffusion is disposed within the well. In addition, a second diffusion is implanted into the substrate separated from the well such that the second diffusion region is disposed entirely outside the well. A channel region is disposed between the first and second regions and gate is disposed over the channel region to form the high voltage transistor. Since the second diffusion region is disposed entirely outside the well in the lower doped substrate, a higher junction breakdown voltage is realized. Furthermore, with the transistor layout described herein having at least a portion of the first diffusion region disposed within the well, adequate device isolation is also realized.

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