Replacement gate process for transistors having elevated...

Replacement gate strained silicon finFET process

Replacement gate with TERA cap

Replacement spacers for MOSFET fringe capacitance reduction...

Replacing a first liner layer with a thicker oxide layer...

Residue free patterned layer formation method applicable to...

Resistance random access memory devices and method of...

Resistance to gate dielectric breakdown at the edges of shallow

Resistance variable device

Resistive memory architectures with multiple memory cells...

Resistively switching memory

Resistor with reduced leakage

Resolution of hemispherical grained silicon peeling and row-dist

Resolving pattern-loading issues of SiGe stressor

Retrograde doped buried layer transistor and method for...

Retrograde well structure formation by nitrogen implantation

Reverse CMOS method for dual isolation semiconductor device

Reverse metal process for creating a metal silicide...

Reverse metal process for creating a metal silicide...

Robust latchup-immune CMOS structure