Resistor with reduced leakage

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S381000

Reexamination Certificate

active

07071052

ABSTRACT:
A resistor100is formed in a semiconductor layer106, e.g., a silicon layer on an SOI substrate. A body region108is formed in a portion of the semiconductor layer106and is doped to a first conductivity type (e.g., n-type or p-type). A first contact region110, which is also doped to the first conductivity type, is formed in the semiconductor layer106adjacent the body region108. A second contact region112is also formed in the semiconductor layer106and is spaced from the first contact region110by the body region108. A dielectric layer116overlies the body region and is formed from a material with a relative permittivity greater than about 8. An electrode114overlies the dielectric116.

REFERENCES:
patent: 4069094 (1978-01-01), Shaw et al.
patent: 4314269 (1982-02-01), Fujiki
patent: 4497683 (1985-02-01), Celler et al.
patent: 4631803 (1986-12-01), Hunter et al.
patent: 4946799 (1990-08-01), Blake et al.
patent: 5155571 (1992-10-01), Wang et al.
patent: 5273915 (1993-12-01), Hwang et al.
patent: 5338960 (1994-08-01), Beasom
patent: 5378919 (1995-01-01), Ochiai
patent: 5447884 (1995-09-01), Fahey et al.
patent: 5461250 (1995-10-01), Burghartz et al.
patent: 5479033 (1995-12-01), Baca et al.
patent: 5534713 (1996-07-01), Ismail et al.
patent: 5629544 (1997-05-01), Voldman et al.
patent: 5656524 (1997-08-01), Eklund et al.
patent: 5708288 (1998-01-01), Quigley et al.
patent: 5714777 (1998-02-01), Ismail et al.
patent: 5763315 (1998-06-01), Benedict et al.
patent: 5789807 (1998-08-01), Correale, Jr.
patent: 5811857 (1998-09-01), Assaderaght et al.
patent: 5955766 (1999-09-01), Ibi et al.
patent: 5972722 (1999-10-01), Visokay et al.
patent: 6008095 (1999-12-01), Gardner et al.
patent: 6015993 (2000-01-01), Voldman et al.
patent: 6046487 (2000-04-01), Benedict et al.
patent: 6059895 (2000-05-01), Chu et al.
patent: 6100153 (2000-08-01), Nowak et al.
patent: 6103599 (2000-08-01), Henley et al.
patent: 6107125 (2000-08-01), Jaso et al.
patent: 6111267 (2000-08-01), Fischer et al.
patent: 6222234 (2001-04-01), Imai
patent: 6232163 (2001-05-01), Voldman et al.
patent: 6256239 (2001-07-01), Akita et al.
patent: 6258664 (2001-07-01), Reinberg
patent: 6281059 (2001-08-01), Cheng et al.
patent: 6291321 (2001-09-01), Fitzgerald
patent: 6294834 (2001-09-01), Yeh et al.
patent: 6339232 (2002-01-01), Takagi
patent: 6358791 (2002-03-01), Hsu et al.
patent: 6387739 (2002-05-01), Smith, III
patent: 6407406 (2002-06-01), Tezuka
patent: 6413802 (2002-07-01), Hu et al.
patent: 6414355 (2002-07-01), An et al.
patent: 6429061 (2002-08-01), Rim
patent: 6448114 (2002-09-01), An et al.
patent: 6475838 (2002-11-01), Bryant et al.
patent: 6475869 (2002-11-01), Yu
patent: 6489664 (2002-12-01), Re et al.
patent: 6518610 (2003-02-01), Yang et al.
patent: 6521952 (2003-02-01), Ker et al.
patent: 6524905 (2003-02-01), Yamamichi et al.
patent: 6525403 (2003-02-01), Inaba et al.
patent: 6555839 (2003-04-01), Fitzgerald
patent: 6558998 (2003-05-01), Belleville et al.
patent: 6573172 (2003-06-01), En et al.
patent: 6576526 (2003-06-01), Kai et al.
patent: 6586311 (2003-07-01), Wu
patent: 6600170 (2003-07-01), Xiang
patent: 6617643 (2003-09-01), Goodwin-Johansson
patent: 6621131 (2003-09-01), Murthy et al.
patent: 6633070 (2003-10-01), Miura et al.
patent: 6653700 (2003-11-01), Chau et al.
patent: 6657276 (2003-12-01), Karlsson et al.
patent: 6686247 (2004-02-01), Bohr
patent: 6720619 (2004-04-01), Chen et al.
patent: 6724019 (2004-04-01), Oda et al.
patent: 6759717 (2004-07-01), Sagarwala et al.
patent: 6762448 (2004-07-01), Lin et al.
patent: 6784101 (2004-08-01), Yu et al.
patent: 6794764 (2004-09-01), Kamal et al.
patent: 6803641 (2004-10-01), Papa Rao et al.
patent: 6891192 (2005-05-01), Chen et al.
patent: 2002/0031890 (2002-03-01), Watanabe et al.
patent: 2002/0074598 (2002-06-01), Doyle et al.
patent: 2002/0076899 (2002-06-01), Skotnicki et al.
patent: 2002/0125471 (2002-09-01), Fitzgerald et al.
patent: 2002/0153549 (2002-10-01), Laibowitz et al.
patent: 2002/0190284 (2002-12-01), Murthy et al.
patent: 2003/0001219 (2003-01-01), Chau et al.
patent: 2003/0030091 (2003-02-01), Bulsara et al.
patent: 2003/0080386 (2003-05-01), Ker et al.
patent: 2004/0026765 (2004-02-01), Currie et al.
patent: 2004/0087098 (2004-05-01), Ng et al.
patent: 2004/0173815 (2004-09-01), Yeo et al.
patent: 2005/0029601 (2005-02-01), Chen et al.
patent: 2005/0224986 (2005-10-01), Tseng et al.
patent: 2005/0236694 (2005-10-01), Wu et al.
patent: 0683522 (1995-11-01), None
patent: 0828296 (1998-03-01), None
patent: WO 03/017336 (2003-02-01), None
Wang, L.K., et al., “On-Chip Decoupling Capacitor Design to Reduce Switching-Noise-Induced Instability in CMOS/SOI VLSI,” Proceedings of the 1995 IEEE International SOI Conference, Oct. 1995, pp. 100-101.
Yeoh, J.C. et al., “MOS Gated Si:SiGe Quantum Wells Formed by Anodic Oxidation,” Semicond. Sci. Technol. (1998), vol. 13, pp. 1442-1445, IOP Publishing Ltd., UK.
Cavassilas, N., et al., “Capacitance-Voltage Characteristics of Metal-Oxide-Strained Semiconductor Si/SiGe Heterostructures,” Nanotech 2002, vol. 1, pp. 600-603.
Blaauw, D., et al., “Gate Oxide and Subthreshold Leakage Characterization, Analysis and Optimization,” date unknown.
“Future Gate Stack,” International Sematech, 2001 Annual Report.
Chang, L., et al., “Reduction of Direct-Tunneling Gate Leakage Current in Double-Gate and Ultra-Thin Body MOSFETs,” 2001 IEEE, Berkeley, CA.
Chang, L., et al., “Direct-Tunneling Gate Leakage Current in Double-Gate and Ultrathin Body MOSFETs,” 2002 IEEE, vol. 49, No. 12, Dec. 2002.
Ismail, K, et al., “Electron Transport Properties of Si/SiGe Heterostructures: Measurements and Device Implications,” Applied Physics Letters, vol. 63, No. 5, (Aug. 2, 1993), pp. 660-662.
Nayak, D.K., et al., “Enhancement-Mode Quantum-Well GexSi1-xPMOS,” IEEE Electron Device Letters, vol. 12, No. 4, (Apr. 1991), pp. 154-156.
Gámiz, F., et al., “Strained-Si/SiGe-on-Insulator Inversion Layers: The Role of Strained-Si Layer Thickness on Electron Mobility,” Applied Physics Letters, vol. 80, No. 22, (Jun. 3, 2002), pp. 4160-4162.
Gámiz, F., et al., “Electron Transport in Strained Si Inversion Layers Grown on SiGe-on-Insulator Substrates,” Journal of Applied Physics, vol. 92, No. 1, (Jul. 1, 2002), pp. 288-295.
Mizuno, T., et al., “Novel SOI p-Channel MOSFETs With Higher Strain in Si Channel Using Double SiGe Heterostructures,” IEEE Transactions on Electron Devices, vol. 49, No. 1, (Jan. 2002), pp. 7-14.
Tezuka, T., et al., “High-Performance Strained Si-on-Insulator MOSFETs by Novel Fabrication Processes Utilizing Ge-Condensation Technique,” Symposium On VLSI Technology Digest of Technial Papers, (2002), pp. 96-97.
Jurczak, M., et al., “Silicon-on-Nothing (SON)—an Innovative Process for Advanced CMOS,” IEEE Transactions on Electron Devices, vol. 47, No. 11, (Nov. 2000), pp. 2179-2187.
Jurczak, M., et al., “SON (Silicon on Nothing)—A New Device Architecture for the ULSI ERA,” Symposium on VLSI Technology Digest of Technical Papers, (1999), pp. 29-30.
Maiti, C.K., et al., “Film Growth and Material Parameters,” Application of Silicon-Germanium Heterostrucutre, Institute of Physics Publishing, Ch. 2 (2001) pp. 32-42.
Tiwari, S., et al., “Hole Mobility Improvement in Silicon-on-Insulator and Bulk Silicon Transistors Using Local Strain,” International Electron Device Meeting, (1997), pp. 939-941.
Ootsuka, F., et al., “A Highly Dense, High-Performance 130nm Node CMOS Technology for Large Scale System-on-a-Chip Applications,” International Electron Device Meeting, (2000), pp. 575-578.
Matthews, J.W., et al., “Defects in Epitaxial Multilayers—I. Misfit Dislocations,” Journal of Crystal Growth, vol. 27, (1974), pp. 118-125.
Matthews, J.W., et al., “Defects in Epitaxial Multilayers—II. Dislocation Pile-Ups, Threading Dislocations, Slip Lines

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Resistor with reduced leakage does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Resistor with reduced leakage, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Resistor with reduced leakage will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3588551

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.