Replacement gate with TERA cap

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S585000, C438S706000, C438S586000

Reexamination Certificate

active

07138308

ABSTRACT:
A field effect transistor formed by a sacrificial gate process has a simplified process and improved yield by using a tunable resistant anti-reflective coating (TERA) as the cap layer over the sacrificial gate layer. The TERA layer serves as a tunable anti-reflection layer for photolithography patterning, a hardmask for etching the sacrificial gate, a polish stopping layer for planarization, and a blocking layer for preventing silicide formation over the sacrificial gate. The TERA is stripped by a two-step process that is highly selective to the nitride spacers, so that the spacers are not damaged in the process of stripping the sacrificial gate.

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U.S. Appl. No. 10/710,409, “Method and Structure to Improve Properties of Tunable Anti-Reflective Coatings”, filed Jul. 8, 2004.

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