Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-01-04
2011-01-04
Smith, Bradley K (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S694000, C438S695000, C257SE21202
Reexamination Certificate
active
07863124
ABSTRACT:
A method for forming a microelectronic structure uses a mask layer located over a target layer. The target layer may be etched while using the mask layer as an etch mask to form an end tapered target layer from the target layer. An additional target layer may be formed over the end tapered target layer and masked with an additional mask layer. The additional target layer may be etched to form a patterned additional target layer separated from the end tapered target layer and absent an additional target layer residue adjacent the end tapered target layer. The method is useful for fabricating CMOS structures including nFET and pFET gate electrodes comprising different nFET and pFET gate electrode materials.
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Chudzik Michael
Doris Bruce B.
Henson William K.
Yan Hongwen
Zhang Ying
International Business Machines - Corporation
Payen Marvin
Percello, Esq. Louis J.
Scully , Scott, Murphy & Presser, P.C.
Smith Bradley K
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