Arrangement for testing integrated circuits
Arrangement for testing programmed port registers of...
Arrangement for verifying that memory external to a network...
Arrangement in a network node for secure storage and...
Arrangements and method relating to transmission of digital...
Arrangements for encoding and decoding digital data
Arrangements for self-measurement of I/O specifications
Arrangements for self-measurement of I/O timing
Array self repair using built-in self test techniques
Array VT mode implementation for a simultaneous operation...
Array-built-in-self-test (ABIST) for efficient, fast,...
ASIC BIST employing stored indications of completion
Asic control and data retrieval method and apparatus having an i
ASIC logic BIST employing registers seeded with differing...
Assembly and method for testing integrated circuit devices
Assembly for LSI test and method for the test
Assisted memory device for reading and writing single and...
Assisted memory system
Assuring sequence number availability in an adaptive...
Asymmetric error correction apparatus and method, and clock...