Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-08-26
1999-11-30
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714 32, G01R 3128
Patent
active
059961023
ABSTRACT:
A testing assembly, and an associated method, for testing an integrated circuit device. The testing assembly is capable of testing an integrated circuit device having a large number of input and output terminals formed of either single-ended terminals or differential terminals. Static testing, both functional and parametric, can be performed upon the integrated circuit device. Additionally, dynamic testing of the integrated circuit device, even integrated circuit devices operable at high frequencies, is possible through operation of the testing assembly. Test signals are applied by way of signal rails to the device undergoing testing. A test signal response indicator is coupled to observe responses to the test signals.
REFERENCES:
patent: 3761695 (1973-09-01), Eichelberger
patent: 3833853 (1974-09-01), Milford
patent: 4236246 (1980-11-01), Skilling
patent: 4348759 (1982-09-01), Schnurmann
patent: 4639664 (1987-01-01), Chiu et al.
patent: 4660197 (1987-04-01), Wrinn et al.
patent: 4683569 (1987-07-01), Rubin
patent: 4862067 (1989-08-01), Brune et al.
patent: 4875003 (1989-10-01), Burke
patent: 4912709 (1990-03-01), Teske et al.
patent: 4970454 (1990-11-01), Stambaugh et al.
patent: 4989209 (1991-01-01), Littlebury et al.
patent: 5070297 (1991-12-01), Kwon et al.
patent: 5084874 (1992-01-01), Whetsel, Jr.
patent: 5155733 (1992-10-01), Blecha, Jr.
patent: 5196788 (1993-03-01), Cistulli
patent: 5202625 (1993-04-01), Farwell
patent: 5220281 (1993-06-01), Matsuki
patent: 5260947 (1993-11-01), Posse
patent: 5260948 (1993-11-01), Simpson et al.
patent: 5268639 (1993-12-01), Gasbarro et al.
patent: 5323107 (1994-06-01), D'Souza
patent: 5331274 (1994-07-01), Jarwala et al.
patent: 5365167 (1994-11-01), Tanaka et al.
patent: 5428624 (1995-06-01), Blair et al.
patent: 5450415 (1995-09-01), Kamada
patent: 5450418 (1995-09-01), Ganapathy
patent: 5483175 (1996-01-01), Ahmad et al.
patent: 5513186 (1996-04-01), Levitt
Beausoliel, Jr. Robert W.
Iqbal Nadeem
Telefonaktiebolaget L M Ericsson (publ)
LandOfFree
Assembly and method for testing integrated circuit devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Assembly and method for testing integrated circuit devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Assembly and method for testing integrated circuit devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1688206