Array self repair using built-in self test techniques

Details Array self repair using built-in self test techniques Array self repair using built-in self test techniques

2007-08-14

2007-08-14

Chung, Phung My (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

C714S733000, C714S726000, C714S718000, C365S201000, C365S225700

Reexamination Certificate

active

11047419

ABSTRACT:
A soft-fust test algorithm is distributed on-chip from an ABSIT engine through an LSSD shift register chain to dynamically evaluate a plurality of arrays with redundancy compensation for bad elements and repair those that are fixable. Using single-bit MISR error evaluation an ABSIT test sequence is executed concurrently on all arrays through the shift register chain. If any arrays are in error, redundancy compensation is employed and the ABIST test is repeated for all possible array redundant combinations until a functional configuration for each array is identified or all possible redundant combinations have been tried. Once functioning array configurations are verified, the associated soft-fuse states can be used to blow fuses and/or extracted for further system setup, permanent fuse-blowing and yield analysis. Multiple shift register chains driven by separate ABIST engines may be required to test all arrays on a chip.

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