ASIC BIST employing stored indications of completion

Details ASIC BIST employing stored indications of completion ASIC BIST employing stored indications of completion

2006-02-07

2006-02-07

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S718000, C714S724000

Reexamination Certificate

active

06996760

ABSTRACT:
A method and apparatus for performing a built-in self-test (“BIST”) on an integrated circuit device are disclosed. A BIST controller comprises a BIST engine and a register. The BIST engine is capable of executing a built-in self-test and storing the results thereof, wherein the results include an indication of whether an executed built-in self-test is completed. The register is capable of storing the results of the executed built-in self-test, including the indication. A method for performing a built-in self-test comprises performing a BIST, including generating a indication of whether the built-in self-test is completed, and storing the indication.

REFERENCES:
patent: 5661732 (1997-08-01), Lo et al.
patent: 5825785 (1998-10-01), Barry et al.
patent: 5982189 (1999-11-01), Motika et al.
patent: 5987635 (1999-11-01), Kishi et al.
patent: 6085346 (2000-07-01), Lepejian et al.
patent: 6148426 (2000-11-01), Kim et al.
patent: 6205564 (2001-03-01), Kim et al.
patent: 6249893 (2001-06-01), Rajsuman et al.
patent: 6442723 (2002-08-01), Koprowski et al.
patent: 6560740 (2003-05-01), Zuraski et al.
patent: 6587979 (2003-07-01), Kraus et al.
patent: 6636997 (2003-10-01), Wong et al.
patent: 6654920 (2003-11-01), Hetherington et al.
patent: 6658611 (2003-12-01), Jun
patent: 6658617 (2003-12-01), Wong
patent: 6661266 (2003-12-01), Variyam et al.
patent: 6665828 (2003-12-01), Arimilli et al.
patent: 6671838 (2003-12-01), Koprowski et al.
patent: 6681359 (2004-01-01), Au et al.
patent: 6684358 (2004-01-01), Rajski et al.
patent: 6738939 (2004-05-01), Udawatta et al.
patent: 2002/0138801 (2002-09-01), Wang et al.
patent: 0848329 (1998-06-01), None
“Reducing Test Data Volume using External/LBIST Hybrid Test Patterns”, Das et al., ITC Test Conference 2000, Oct. 3-5, 2000, pp 115-122.
U.S. Appl. No. 09/976,554, filed Oct. 12, 2001.
U.S. Appl. No. 09/976,701, filed Oct. 12, 2001.
U.S. Appl. No. 09/976,708, filed Oct. 12, 2001.
U.S. Appl. No. 09/976,707, filed Oct. 12, 2001.
U.S. Appl. No. 09/976,490, filed Oct. 12, 2001.
U.S. Appl. No. 09/976,523, filed Oct. 12, 2001.

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