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Test data pattern for testing a CRC algorithm

Error detection/correction and fault detection/recovery – Pulse or data error handling – Testing of error-check system
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Test data reporting and analyzing using data array and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test device and method for electrically testing electronic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test device, test system and method for testing a memory...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test entry circuit and method for generating test entry signal

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test for processor memory cache

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test generation methods for reducing power dissipation and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test generator for converting a model of computer component...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test generator having a poisson distribution error signal

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test head utilized in a test system to perform automated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test interface for memory elements

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test interface for random access memory (RAM) built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test interface for verification of high speed embedded...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test interface, system, and method for testing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test language conversion method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test limits based on position

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test method and apparatus for semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Test method and apparatus for writing a memory array with a redu

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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